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3:49:56
beach
The fact that RISC-V is "open" is not the only reason for my interest for it. I believe, as pjb said, that "it's the future", in that there seems to be a lot of momentum for it. Also it's a fresh architecture, created from scratch from decades of experience with existing architectures, so it is highly orthogonal.
3:57:40
beach
I believe ebrasca is the owner of (or at least has access to) Talos II or something like that. It would then be fine with me if ebrasca were to create a suitable backend for SICL that will make it run on such systems.
3:58:38
beach
But I personally don't have the ambition (nor the time, energy, etc) to support a bunch of backends by myself.
4:09:28
beach
What I will do, though, is make sure that there is a protocol for backends, so that new ones can be created without modifications to the main code base.
4:54:51
moon-child
I hold out hope for forwardcom and mill. But those may just be pipe dreams; riscv is more than adequate, and certainly a dramatic improvement over x86
4:58:50
fiddlerwoaroof
There's just so much money in the ecosystem, and Apple's new chips are pretty impressive
5:00:43
fiddlerwoaroof
Anyways, I might be wrong I'm sort of curious what will happen over the next decade or two here
5:15:09
moon-child
I think (hope?) that software will become generally more portable and opensource, such that the underlying architecture doesn't matter so much
5:16:24
moon-child
which already happened with GPUs. I also believe that apple was requiring applications submitted to their package manager be accompanied by llvm bitcode, which they were then able to use to transparently recompile the applications to arm
5:38:07
beach
The underlying architecture already doesn't matter much to application programs. It matters a lot to system software, making life for the compiler writer easier or harder.
5:38:17
no-defun-allowed
Surely you need a bit (pun?) more than bitcode to get it behaving on ARM. I recall the memory model on ARM is supposed to be a lot "weaker"
5:39:35
moon-child
llvm has atomic instructions as primitives, so it can account for the memory model when doing code generation
5:49:00
fiddlerwoaroof
I believe one thing this enabled is that Apple went from a 32bit to a 64bit CPU on the watch without any developer effort