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18:39:24
aeth
If Itanium really is as hard as it sounds, then porting compilers to Itanium will be the new retro challenge in 20 years or so when the 00s are retro instead of the 80s
19:12:43
karlosz
riscv without threads passes all but 1 test not related to the lack of floating trap hardware
19:33:58
aeth
why is PPC64 marked as in progress on the platform-table, but not RISC V? http://www.sbcl.org/platform-table.html
19:35:09
aeth
I was going to look into a port when something like that got released, but you (I guess?) beat me to it by not waiting for hardware :-p
19:35:19
karlosz
crazy idea for arm32 threads: fix NIL to be some smallish integer (< 16 bits, maybe)
19:38:17
aeth
of the list that stassats gave, only mips 64 sounds somewhat mainstream, although idk if it's used at all
19:40:17
karlosz
i tried to keep the port building on both, but some 64-bit assumptions might have crept in
19:42:55
aeth
afaik 32 bit risc v is primarily embedded and the consumer boards with useful extras like division are probably going to be 64 bit
19:48:25
karlosz
i don't know 32 bit arm architecture that well, but im surprised that nil got its own register in the first place if thats the case
19:50:56
karlosz
so, what, it'd take an instruction to load nil into a scratch register, then do a load off of it