15:53:27fittestbits__froggey: I did some research and looked through linux code some and found out they use the mfence instruction for a dma write barrier. This seems to work.
15:54:08fittestbits__I've added all three of the "fence" instructions: sfence, lfence and mfence to cpu.lisp. I'll include that as part of my commit/PR.
15:55:05fittestbits__However, I haven't been able to figure out the equivalent ARM code for mezzano. The instruction is "dmb oshst".
15:55:45fittestbits__That is, I haven't been able to figure out how to create a function that runs that instruction.
15:59:07fittestbits__In supervisor/x86-64/cpu.lisp, I've added functions: lfence, mfence, sfence and dma-write-barrier. We probably want only to use names that are not instruction specific.
15:59:31fittestbits__So maybe keep dma-write-barrier and get rid of the other?
16:35:35froggeyI'd have expected virtualbox to be completely coherent, but I guess not...
16:36:46froggeyfor ARM it looks like you'd have to define the dmb instruction in compiler/lap-arm64.lisp, but don't worry as the arm64 port has bitrotted a little